A wafer for a semiconductor device as a substrate (hereinafter, a “wafer”) is processed with a predetermined process such as, for example, a plasma process in a depressurized processing chamber of a substrate processing apparatus. The wafer is electrostatically adsorbed by an electrostatic chuck disposed in the processing chamber so as not to deviate from a desired position during the predetermined process.
The electrostatic chuck is a planar member made of a high-resistance dielectric material such as, for example, ceramics having an electrostatic electrode plate therein, and the wafer is placed on the upper surface of the electrostatic chuck. When a DC power source is connected to the electrostatic electrode plate to supply a positive DC voltage, a negative potential is generated on the surface of the electrostatic chuck side (hereinafter, a “rear surface”) of the placed wafer, and thus, a potential difference is generated between the electrostatic electrode plate and the rear surface of the wafer. However, since the dielectric material of the electrostatic chuck presents between the electrostatic electrode plate and the wafer, electric charges do not move between the electrostatic electrode plate and the wafer, and thus, the potential difference is maintained between the electrostatic electrode plate and the rear surface of the wafer. As a result, the wafer is electrostatically adsorbed at the electrostatic chuck by an electrostatic force caused by the potential difference.
An upper electrode plate with a ground potential is disposed so as to face the electrostatic chuck in the processing chamber of the substrate processing apparatus. Since there exists plasma 51 always between a wafer W and an upper electrode plate 50, when a plasma process is performed for wafer W in the substrate processing apparatus, as shown in FIG. 6A, the electric charges between wafer W and upper electrode plate 50 freely move by the electrons or the cations in plasma 51. As a result, even though the potential of an electrostatic electrode plate 52 (represented by “HV” in the drawings) existing in an electrostatic chuck 53 is set to, for example, 2.5 kV, the potential of wafer W (represented by “Wafer” in the drawings) becomes the same ground potential as the potential of upper electrode plate 50 (represented by “UEL” in the drawings), that is, 0 V.
In order to easily remove wafer W from electrostatic chuck 53 after the plasma process, for example, it has been proposed that voltage having an opposite polarity to the voltage applied during the plasma process is applied to electrostatic electrode plate 52 (see, for example, Japanese Patent Application Laid-Open No. H04-230051) or that the potential of electrostatic electrode plate 52 is changed to 0 V. However, when the potential of electrostatic electrode plate 52 is changed from 2.5 kV to 0 V, since the electric charges do not move between wafer W and electrostatic electrode plate 52 and the potential difference between wafer W and electrostatic electrode plate 52 is maintained, the potential of wafer W is also changed by the same potential as the potential of electrostatic electrode plate 52. That is, as shown in FIG. 6B, the potential of wafer W is changed from 0 V to −2.5 kV.
In this case, since the potential difference between wafer W and upper electrode plate 50 is increased, direct current discharge 54 (hereinafter, “DC discharge”) is generated between wafer W and upper electrode plate 50 (FIG. 6C). When DC discharge 54 is generated, the electric charges move between wafer W and upper electrode plate 50, such that the potential difference between wafer W and upper electrode plate 50 is decreased. DC discharge 54 generated between upper electrode plate 50 and wafer W stops when the potential difference between upper electrode plate 50 and wafer W is decreased up to the potential difference in which the discharge can be maintained.